1-BIT FULL ADDER VIRTUAL TRAINER FOR ELECTRICAL ENGINEERING EDUCATION

Miftah Muhammad, Dharmawan Dharmawan, Suparman Suparman

Abstract


The increasing complexity of digital logic design and the rapid evolution of remote learning environments have highlighted the need for innovative educational tools in electrical engineering. Traditional laboratory-based methods, while effective for hands-on learning, often face challenges related to cost, accessibility, and infrastructure limitations, which restrict student engagement and practice opportunities. In response, virtual learning platforms have emerged as cost-effective alternatives that bridge the gap between theoretical knowledge and practical application. This study presents the development of a 1-bit Full Adder Virtual Trainer designed to enhance conceptual understanding and practical skill acquisition in digital logic courses. The system integrates interactive simulation, real-time logic evaluation, and visual feedback to facilitate the comprehension of fundamental circuit behavior. By enabling students to experiment with input variables and observe logical operations dynamically, the trainer supports a more engaging and flexible learning experience. The proposed tool aims to strengthen the link between theory and practice in electrical engineering education, providing an accessible, efficient, and scalable approach to digital electronics learning.

Keywords


Virtual Trainer, Full Adder, Digital Logic, Electrical Engineering Education, Interactive Learning

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References


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DOI: https://doi.org/10.33387/josae.v%25vi%25i.10967

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